LMK04906BISQ

Key Features

Type: Clock Jitter Cleaner and Generator

Input Reference: Up to 1.4 GHz (differential input)

Output Frequency: Up to 1.4 GHz (LVPECL), 800 MHz (LVDS), or 250 MHz (LVCMOS)

Number of Outputs: 14 outputs total (7 differential pairs, configurable as 14 single-ended)

Output Types: LVPECL, LVDS, or LVCMOS

Jitter Performance:

< 100 fs typical RMS jitter (12 kHz to 20 MHz offset)

Ultra-low phase noise across wide frequencies

PLL Configuration: Dual PLLs (PLL1 + PLL2) for jitter attenuation and frequency multiplication

VCO Frequency Range: 2.37 GHz – 2.60 GHz

Power Supply: 3.3 V ±5%

Control Interface: SPI serial interface

Integrated Features:

On-chip VCO and programmable dividers

SYSREF and SYNC features for JESD204B/C support

Digital delay and phase adjustment per output

Holdover and zero-delay modes

Operating Temperature: –40 °C to +85 °C (industrial grade)

Package Type: 64-pin WQFN (9 mm × 9 mm)

RoHS / REACH: Compliant and Pb-free

Performance Highlights

Dual-PLL architecture enables flexible jitter cleaning and frequency synthesis

Supports deterministic latency and synchronization (JESD204B/C compatible)

Excellent noise floor and phase noise performance for ADC/DAC clocking

Per-output fine delay and divider control for multi-channel timing alignment

Highly programmable clock tree with SPI control

Applications

High-speed data converters (ADC/DAC clocking)

JESD204B/C clock generation and synchronization

Wireless base stations and small cells

Test and measurement equipment

Network and communication backplane systems

FPGA and DSP timing solutions