Key Features
Memory Type: DDR3 SDRAM
Density: 4 Gbit (256M x 16-bit organization)
Speed Grade: DDR3-1333 (7-7-7), 1.5 ns clock cycle (667 MHz clock, 1333 Mbps data rate)
Supply Voltage: 1.5 V ±0.075 V
I/O Voltage: SSTL_15 compatible
Package: 96-ball TFBGA (9 mm × 13 mm, 0.8 mm ball pitch)
Temperature Range: –40 °C to +85 °C (Industrial grade)
CAS Latency: CL = 5 to 11 supported
Burst Length: 4, 8
Data Bus Width: 16-bit
Architecture: 8 banks, 8192 refresh cycles per 64 ms
Timing: tRCD = 13.75 ns, tRP = 13.75 ns, tRC = 48.75 ns
Power Dissipation: Low active and standby current
Lead-Free / RoHS Compliant
Performance
High-speed data transfer up to 1333 Mbps/pin
Auto and self-refresh modes for low power operation
Programmable burst length, drive strength, and on-die termination (ODT)
Internal DLL for phase-aligned data output
Supports differential clock input (CK, CK#) for precise timing
Applications
Embedded and industrial systems
Networking and telecom equipment
Automotive and medical devices
Consumer electronics
FPGA and SoC-based platforms
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